Recently memristor-based applications and circuits are receiving an increasedattention. Furthermore, memristors are also applied in logic circuit design.Material implication logic is one of the main areas with memristors. In thispaper an optimized memristor-based full adder design by material implicationlogic is presented. This design needs 27 memristors and less area in comparisonwith typical CMOS-based 8-bit full adders. Also the presented full adder needsonly 184 computational steps which enhance former full adder design speed by 20percent.
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机译：f 3 （Σ CD ） max 的“ k”条件最大并行并行乘数f Σ的功能设计（Σ CD ），对“ [ 1,2 S g h1””参数进行“解密”的实现过程]和[ 1,2 S g h2 ]“补码RU”，由三进制数系统f（+ 1,0，-1）和逻辑区分d 1 / dn→f 1 （ + ←↓- ） d / dn （俄罗斯逻辑版本）
